A Complexity Theory for VLSI

The established techniques of computational complexity can be applied to the new problems posed by very !urge-scale integrated (VLSI) circuits. This thesis develops a "VLSI model of computation" and derives upper and lower bounds on the silicon area and time required to snlve the problems of sorting and discrete Fourier transformation. In particular, the area (A) and time (T) taken by any VLSI chip using any algorithm to perform an N point Fourier transform. must satisfy AT2 > LN/8J2Jog2N. A more general result for both sorting and Fourier transformation is that AT2x :: ncNt+XIog 2 XN), for all X in the range 05x51. Also, the energy dissipated by a VLSI chip during the solution of either of these problems is at least n(N3121og N). The tightness of these bounds is ·demonstrated by the existence of nearly optimal• circuits. This thesis describes both a fast chip (T :: O(log3N), A = O(N2 /!og112N)) based on the shuffle-exchnnge interconnection pattern, and a slow chip (T :: O(N112 ), A = O(N log2N)) based on the mesh pattern. A Complexity Theory for VlSI (Thesis summary) C. D. Thompson 14 September 1979 Carnegie-Mellon University Computer Science Department This research is supported in part by the National Science Foundation under Grant MCS 78,...236-76 and a graduate fellowship, and in part by the Office of Naval Research under Contract N00014-76-C-0370. Table of